The electrical characterisation of classical and quantum devices is a critical step in the development cycle of heterogeneous material stacks for semiconductor spin qubits. In the case of silicon, properties such as disorder and energy separation of conduction band valleys are commonly investigated individually upon modifications in selected parameters of the material stack. However, this reductionist approach fails to consider the interdependence between different structural and electronic properties at the danger of optimising one metric at the expense of the others. Here, we achieve a significant improvement in both disorder and valley splitting by taking a co-design approach to the material stack. We demonstrate isotopically purified, strained quantum wells with high mobility of 3.14(8) × 10⁵ cm² V⁻¹ s⁻¹ and low percolation density of 6.9(1) × 10¹⁰ cm⁻². These low disorder quantum wells support quantum dots with low charge noise of 0.9(3) μeV Hz^−1/2 and large mean valley splitting energy of 0.24(7) meV, measured in qubit devices. By striking the delicate balance between disorder, charge noise, and valley splitting, these findings provide a benchmark for silicon as a host semiconductor for quantum dot qubits. We foresee the application of these heterostructures in larger, high-performance quantum processors.

Micromagnet-based electric dipole spin resonance offers an attractive path for the near-term scaling of dense arrays of silicon spin qubits in gate-defined quantum dots while maintaining long coherence times and high control fidelities. However, accurately controlling dense arrays of qubits using a multiplexed drive will require an understanding of the cross-talk mechanisms that may reduce operational fidelity. We identify an unexpected cross-talk mechanism whereby the Rabi frequency of a driven qubit is drastically changed when the drive of an adjacent qubit is turned on. These observations raise important considerations for scaling single-qubit control.

As part of the National Agenda for Quantum Technology, QuTech (TU Delft and TNO) has agreed to make quantum technology accessible to society and industry via its full-stack prototype: Quantum Inspire. This system includes two different types of programmable quantum chips: circuits made from superconducting materials (transmons), and circuits made from silicon-based materials that localize and control single-electron spins (spin qubits). Silicon-based spin qubits are a natural match to the semiconductor manufacturing community, and several industrial fabrication facilities are already producing spin-qubit chips. Here, we discuss our latest results in spin-qubit technology and highlight where the semiconducting community has opportunities to drive the field forward. Specifically, developments in the following areas would enable fabrication of more powerful spin-qubit based quantum computing devices: circuit design rules implementing cryogenic device physics models, high-fidelity gate patterning of low resistance or superconducting metals, gate-oxide defect mitigation in relevant materials, silicon-germanium heterostructure optimization, and accurate magnetic field generation from on-chip micromagnets.

Full-scale quantum computers require the integration of millions of qubits, and the potential of using industrial semiconductor manufacturing to meet this need has driven the development of quantum computing in silicon quantum dots. However, fabrication has so far relied on electron-beam lithography and, with a few exceptions, conventional lift-off processes that suffer from low yield and poor uniformity. Here we report quantum dots that are hosted at a ²⁸Si/²⁸SiO₂ interface and fabricated in a 300 mm semiconductor manufacturing facility using all-optical lithography and fully industrial processing. With this approach, we achieve nanoscale gate patterns with excellent yield. In the multi-electron regime, the quantum dots allow good tunnel barrier control—a crucial feature for fault-tolerant two-qubit gates. Single-spin qubit operation using magnetic resonance in the few-electron regime reveals relaxation times of over 1 s at 1 T and coherence times of over 3 ms.

Electron spins in Si/SiGe quantum wells suffer from nearly degenerate conduction band valleys, which compete with the spin degree of freedom in the formation of qubits. Despite attempts to enhance the valley energy splitting deterministically, by engineering a sharp interface, valley splitting fluctuations remain a serious problem for qubit uniformity, needed to scale up to large quantum processors. Here, we elucidate and statistically predict the valley splitting by the holistic integration of 3D atomic-level properties, theory and transport. We find that the concentration fluctuations of Si and Ge atoms within the 3D landscape of Si/SiGe interfaces can explain the observed large spread of valley splitting from measurements on many quantum dot devices. Against the prevailing belief, we propose to boost these random alloy composition fluctuations by incorporating Ge atoms in the Si quantum well to statistically enhance valley splitting.

High-fidelity control of quantum bits is paramount for the reliable execution of quantum algorithms and for achieving fault tolerance—the ability to correct errors faster than they occur¹. The central requirement for fault tolerance is expressed in terms of an error threshold. Whereas the actual threshold depends on many details, a common target is the approximately 1% error threshold of the well-known surface code^2,3. Reaching two-qubit gate fidelities above 99% has been a long-standing major goal for semiconductor spin qubits. These qubits are promising for scaling, as they can leverage advanced semiconductor technology⁴. Here we report a spin-based quantum processor in silicon with single-qubit and two-qubit gate fidelities, all of which are above 99.5%, extracted from gate-set tomography. The average single-qubit gate fidelities remain above 99% when including crosstalk and idling errors on the neighbouring qubit. Using this high-fidelity gate set, we execute the demanding task of calculating molecular ground-state energies using a variational quantum eigensolver algorithm⁵. Having surpassed the 99% barrier for the two-qubit gate fidelity, semiconductor qubits are well positioned on the path to fault tolerance and to possible applications in the era of noisy intermediate-scale quantum devices.

The most promising quantum algorithms require quantum processors that host millions of quantum bits when targeting practical applications¹. A key challenge towards large-scale quantum computation is the interconnect complexity. In current solid-state qubit implementations, an important interconnect bottleneck appears between the quantum chip in a dilution refrigerator and the room-temperature electronics. Advanced lithography supports the fabrication of both control electronics and qubits in silicon using technology compatible with complementary metal oxide semiconductors (CMOS)². When the electronics are designed to operate at cryogenic temperatures, they can ultimately be integrated with the qubits on the same die or package, overcoming the ‘wiring bottleneck’^3–6. Here we report a cryogenic CMOS control chip operating at 3 kelvin, which outputs tailored microwave bursts to drive silicon quantum bits cooled to 20 millikelvin. We first benchmark the control chip and find an electrical performance consistent with qubit operations of 99.99 per cent fidelity, assuming ideal qubits. Next, we use it to coherently control actual qubits encoded in the spin of single electrons confined in silicon quantum dots^7–9 and find that the cryogenic control chip achieves the same fidelity as commercial instruments at room temperature. Furthermore, we demonstrate the capabilities of the control chip by programming a number of benchmarking protocols, as well as the Deutsch–Josza algorithm¹⁰, on a two-qubit quantum processor. These results open up the way towards a fully integrated, scalable silicon-based quantum computer.

Radio-frequency (rf) reflectometry offers a fast and sensitive method for charge sensing and spin readout in gated quantum dots. We focus in this work on the implementation of rf readout in accumulation-mode gate-defined quantum dots, where the large parasitic capacitance poses a challenge. We describe and test two methods for mitigating the effect of the parasitic capacitance, one by on-chip modifications and a second by off-chip changes. We demonstrate that on-chip modifications enable high-performance charge readout in Si/SixGe1-x quantum dots, achieving a fidelity of 99.9% for a measurement time of 1μs.

The mission of QuTech is to bring quantum technology to industry and society by translating fundamental scientific research into applied research. To this end we are developing Quantum Inspire (QI), a full-stack quantum computer prototype for future co-development and collaborative R&D in quantum computing. A prerelease of this prototype system is already offering the public cloud-based access to QuTech technologies such as a programmable quantum computer simulator (with up to 31 qubits) and tutorials and user background knowledge on quantum information science (www.quantum-inspire.com). Access to a programmable CMOS-compatible Silicon spin qubit-based quantum processor will be provided in the next deployment phase. The first generation of QI's quantum processors consists of a double quantum dot hosted in an in-house grown SiGe/²⁸Si/SiGe heterostructure, and defined with a single layer of Al gates. Here we give an overview of important aspects of the QI full-stack. We illustrate QI's modular system architecture and we will touch on parts of the manufacturing and electrical characterization of its first generation two spin qubit quantum processor unit. We close with a section on QI's qubit calibration framework. The definition of a single qubit Pauli X gate is chosen as concrete example of the matching of an experiment to a component of the circuit model for quantum computation.

Quantum computers (QC), comprising qubits and a classical controller, can provide exponential speed-up in solving certain problems. Among solid-state qubits, transmons and spin-qubits are the most promising, operating « 1K. A qubit can be implemented in a physical system with two distinct energy levels representing the |0) and |1) states, e.g. the up and down spin states of an electron. The qubit states can be manipulated with microwave pulses, whose frequency f matches the energy level spacing E = hf (Fig. 19.1.1). For transmons, f 6GHz, for spin qubits f20GHz, with the desire to lower it in the future. Qubit operations can be represented as rotations in the Bloch sphere. The rotation axis is set by the phase of the microwave signal relative to the qubit phase, which must be tracked for coherent operations. The pulse amplitude and duration determine the rotation angle. A π-rotation is typically obtained using a 50ns Gaussian pulse for transmons and a 500ns rectangular pulse for spin qubits with powers of -60dBm and -45dBm, respectively.

Solid-state qubits integrated on semiconductor substrates currently require at least one wire from every qubit to the control electronics, leading to a so-called wiring bottleneck for scaling. Demultiplexing via on-chip circuitry offers an effective strategy to overcome this bottleneck. In the case of gate-defined quantum dot arrays, specific static voltages need to be applied to many gates simultaneously to realize electron confinement. When a charge-locking structure is placed between the quantum device and the demultiplexer, the voltage can be maintained locally. In this study, we implement a switched-capacitor circuit for charge-locking and use it to float the plunger gate of a single quantum dot. Parallel plate capacitors, transistors, and quantum dot devices are monolithically fabricated on a Si/SiGe-based substrate to avoid complex off-chip routing. We experimentally study the effects of the capacitor and transistor size on the voltage accuracy of the floating node. Furthermore, we demonstrate that the electrochemical potential of the quantum dot can follow a 100 Hz pulse signal while the dot is partially floating, which is essential for applying this strategy in qubit experiments.

Building a large-scale quantum computer requires the co-optimization of both the quantum bits (qubits) and their control electronics. By operating the CMOS control circuits at cryogenic temperatures (cryo-CMOS), and hence in close proximity to the cryogenic solid-state qubits, a compact quantum-computing system can be achieved, thus promising scalability to the large number of qubits required in a practical application. This work presents a cryo-CMOS microwave signal generator for frequency-multiplexed control of 4\times 32 qubits (32 qubits per RF output). A digitally intensive architecture offering full programmability of phase, amplitude, and frequency of the output microwave pulses and a wideband RF front end operating from 2 to 20 GHz allow targeting both spin qubits and transmons. The controller comprises a qubit-phase-tracking direct digital synthesis (DDS) back end for coherent qubit control and a single-sideband (SSB) RF front end optimized for minimum leakage between the qubit channels. Fabricated in Intel 22-nm FinFET technology, it achieves a 48-dB SNR and 45-dB spurious-free dynamic range (SFDR) in a 1-GHz data bandwidth when operating at 3 K, thus enabling high-fidelity qubit control. By exploiting the on-chip 4096-instruction memory, the capability to translate quantum algorithms to microwave signals has been demonstrated by coherently controlling a spin qubit at both 14 and 18 GHz.

Circuit quantum electrodynamics (QED) employs superconducting microwave resonators as quantum buses. In circuit QED with semiconductor quantum-dot-based qubits, increasing the resonator impedance is desirable as it enhances the coupling to the typically small charge dipole moment of these qubits. However, the gate electrodes necessary to form quantum dots in the vicinity of a resonator inadvertently lead to a parasitic port through which microwave photons can leak, thereby reducing the quality factor of the resonator. This is particularly the case for high-impedance resonators, as the ratio of their total capacitance over the parasitic port capacitance is smaller, leading to larger microwave leakage than for 50-ω resonators. Here, we introduce an implementation of on-chip filters to suppress the microwave leakage. The filters comprise a high-kinetic-inductance nanowire inductor and a thin-film capacitor. The filter has a small footprint and can be placed close to the resonator, confining microwaves to a small area of the chip. The inductance and capacitance of the filter elements can be varied over a wider range of values than their typical spiral inductor and interdigitated capacitor counterparts. We demonstrate that the total linewidth of a 6.4 GHz and approximately 3-kω resonator can be improved down to 540 kHz using these filters.

Silicon spin qubits are one of the leading platforms for quantum computation^1,2. As with any qubit implementation, a crucial requirement is the ability to measure individual quantum states rapidly and with high fidelity. Since the signal from a single electron spin is minute, the different spin states are converted to different charge states^3,4. Charge detection, so far, has mostly relied on external electrometers^5–7, which hinders scaling to two-dimensional spin qubit arrays^2,8,9. Alternatively, gate-based dispersive read-out based on off-chip lumped element resonators has been demonstrated^10–13, but integration times of 0.2–2 ms were required to achieve single-shot read-out^14–16. Here, we connect an on-chip superconducting resonant circuit to two of the gates that confine electrons in a double quantum dot. Measurement of the power transmitted through a feedline coupled to the resonator probes the charge susceptibility, distinguishing whether or not an electron can oscillate between the dots in response to the probe power. With this approach, we achieve a signal-to-noise ratio of about six within an integration time of only 1 μs. Using Pauli’s exclusion principle for spin-to-charge conversion, we demonstrate single-shot read-out of a two-electron spin state with an average fidelity of >98% in 6 μs. This result may form the basis of frequency-multiplexed read-out in dense spin qubit systems without external electrometers, therefore simplifying the system architecture.

We demonstrate the strong coupling between a single electron spin in silicon and a single photon in a superconducting microwave cavity. Using the same cavity we perform rapid high-fidelity single-shot readout of two-electron spin states.

In the version of this Letter originally published, the second, third and fourth exponential terms in equation (3) were incorrect; the corrected equation is shown below. (Formula presented.). The correct equation was used for data analysis. The online versions have been amended.

Quantum computing's value proposition of an exponential speedup in computing power for certain applications has propelled a vast array of research across the globe. While several different physical implementations of device level qubits are being investigated, semiconductor spin qubits have many similarities to scaled transistors. In this article, we discuss the device/integration of full 300mm based spin qubit devices. This includes the development of (i) a ²⁸ Si epitaxial module ecosystem for growing isotopically pure substrates with among the best Hall mobility at these oxide thicknesses, (ii) a custom 300mm qubit testchip and integration/device line, and (iii) a novel dual nested gate integration process for creating quantum dots.

Long coherence times of single spins in silicon quantum dots make these systems highly attractive for quantum computation, but how to scale up spin qubit systems remains an open question. As a first step to address this issue, we demonstrate the strong coupling of a single electron spin and a single microwave photon. The electron spin is trapped in a silicon double quantum dot, and the microwave photon is stored in an on-chip high-impedance superconducting resonator. The electric field component of the cavity photon couples directly to the charge dipole of the electron in the double dot, and indirectly to the electron spin, through a strong local magnetic field gradient from a nearby micromagnet. Our results provide a route to realizing large networks of quantum dot–based spin qubit registers.

In spite of its ubiquity in strongly correlated systems, the competition of paired and nematic ground states remains poorly understood. Recently such a competition was reported in the two-dimensional electron gas at filling factor ν = 5/2. At this filling factor a pressure-induced quantum phase transition was observed from the paired fractional quantum Hall state to the quantum Hall nematic. Here we show that the pressure-induced paired-to-nematic transition also develops at ν = 7/2, demonstrating therefore this transition in both spin branches of the second orbital Landau level. However, we find that pressure is not the only parameter controlling this transition. Indeed, ground states consistent with those observed under pressure also develop in a sample measured at ambient pressure, but in which the electron-electron interaction was tuned close to its value at the quantum critical point. Our experiments suggest that electron-electron interactions play a critical role in driving the paired-to-nematic transition.