Silicon heterojunction (SHJ) solar cells are one of the most promising PV technologies nowadays due to high photoconversion efficiencies and low manufacturing costs. However, standard front/back-contacted (FBC) solar cells feature a front metal grid that brings shading to the front side of the devices, which limits the conversion efficiency of solar cells. One solution is to move metal contacts fully to the back by introducing interdigitated-back-contacted (IBC) architecture. In 2018, IBC-SHJ solar cells achieved a photoconversion efficiency of 26.7% holding a record for single-junction c-Si cells. However, the standard fabrication process of IBC solar cells comes with increased complexity and manufacturing costs. The focus of this research is on developing and optimizing a simple and industry-appealing fabrication process for high-efficiency IBC-SHJ solar cells.

The first part of the project investigates the simple processing of IBC-SHJ solar cells featuring tunneling recombination junction (TRJ). The first tunneling IBC devices are fabricated successfully. However, shunting is observed from the J-V curves of fabricated devices, which can be related to the internal shunting of tunneling IBC architecture and high lateral conductivity of p-type nc-Si:H-based blanket layer. Hence, alternative contact stacks are designed for application in the previously developed flowchart with the aim to minimize the lateral conductivity of the blanket layer and keep the fabrication process simple.

The proposed hole collection contact stack is firstly implemented in the front junction (FJ) FBC solar cells. The FJ FBC devices reach Voc of 704 mV and FF of 79.29% . Rear junction (RJ) FBC solar cells are fabricated featuring a novel electron collection contact stack that is developed within this thesis. Voc of 715 mV and FF of 82.24% are obtained in RJ devices. The results of RJ FBC solar cells with a newly developed contact stack show excellent results in terms of FF, making it a promising candidate for further application in IBC devices. The introduction of the optimized device design enabled the successful fabrication of IBC solar cells with the simple process developed for tunneling IBC devices while ensuring no shunting occurs. Fabricated devices represent a proof-of-concept of the novel configuration, providing a promising starting point for future development.

Carrier selective passivating contacts (CSPC) have proven to effectively curtail the recombination losses emerging at directly metallised contacts of crystalline Silicon (c-Si) solar cells. CSPCs enabled using an ultra-thin interfacial tunnel oxide layer (SiOx) capped by a doped polycrystalline Silicon (poly-Si) layer also referred to as Tunnel Oxide Passivating Contacts (TOPCon) have resulted in efficiencies as high as 25.8%. This thesis project addresses the development of oxygen alloyed poly-Si (poly-SiOx) in combination with an interfacial oxide layer grown by dry thermal oxidation. The limited transparency of poly-Si based contacts brought on by high free carrier absorption (FCA) can be mitigated by the use of poly-SiOx based passivating contacts owing to their wider bandgaps which induce stronger band bending.
To begin with, poly-SiOx CSPC were optimised by determining the optimum thermal budgets for tunnel oxide growth and hydrogenation scheme. Tunnel oxide layers grown at 675 ͦC 6 minutes demonstrated very good passivation for p-type polished and n-type textured CSPCs indicated by their implied Voc of 709 mV and 711 mV respectively. For the p-type textured CSPC identified as the primary limiting factor when deploying in c-Si solar cells, a tunnel oxide layer grown at 675 ͦC 3 minutes in conjunction with a two-step annealing scheme showed a crucial enhancement in passivation quality with a final implied Voc of 687 mV.
The single side textured front back contacted (FBC) solar cell fabricated using the optimised p-type polished and n-type textured poly-SiOx CSPC recorded a conversion efficiency of 20.94% on a 4 cm2 screen printed solar cell. The reported efficiency is the maximum that has been attained so far for the configuration that uses a thermally grown tunnel oxide layer with poly-SiOx CSPCs. Effective carrier transport and carrier collection was illustrated by a fill factor (FF) of 79.6%. A Jsc of 37.91 mA/cm2 was recorded for the same. A comparison with a single side textured FBC solar cell that employed a tunnel oxide layer grown by nitric acid oxidation of Silicon (NAOS) revealed a superiority in performance by the thermally grown tunnel oxide layer resulting in better passivation and carrier selectivity.
Lastly, the optimised n-type textured and p-type textured CSPCs were implemented on a double side textured FBC solar cell. The two-step annealing scheme that showed beneficial results for the p-type textured CSPC was implemented within the FBC solar cell, leading to an implied Voc of 698mV post hydrogenation. It is worth mentioning that this is the highest value achieved until now for this novel cell architecture. Implementation of screen printing resulted in a final conversion efficiency of 19.38% on a 4 cm2 solar cell with a FF and Jsc of 77.89% and 37.65 mA/cm2 respectively.

Interdigitated back-contacted solar cell (IBC) is a successful high-efficiency solar cell concept. Without a metal grid at the front side, the metal shading loss is eliminated. However, the fabrication process of an IBC cell is much more complicated than that of a FBC cell. Within the PVMD group, two poly-Si carrier-selective passivating contacts (CSPCs) IBC cell fabrication methods were developed, namely Self-aligned and Etch-back method. These two methods require respectively to pattern the IBC rear side twice and three times to define the emitter and BSF area. In this project, a novel poly-Si/SHJ hybrid IBC solar cell design using tunneling recombination junction (TRJ) is proposed, which only requires one pattern step to define the emitter and BSF area, thus, significantly simplifies the flowcharts of IBC cells.
The main objective of this thesis is to demonstrate the novel poly-Si/SHJ hybrid TRJ IBC cell concept by fabricating such high-efficiency hybrid IBC cells. With the proposed hybrid IBC cell design, the BSF layers are deposited on the full rear side after the emitter patterning. Thus, a TRJ is introduced at the emitter ((p+)poly-Si). The carrier tunneling efficiency across the TRJ layers should be guaranteed. The BSF layers passivation quality is also crucial for hybrid IBC cell performance, and the shunting due to the full area deposited BSF layers should be limited as well.
The TRJ proof-of-concept was firstly demonstrated in FBC cells due to their easier fabrication processes. And different materials combinations of (i)a-Si:H, (n)a-Si:H and (n)nc-Si:H were used to form TRJ with (p+)poly-SiOx. Firstly, it was found that the existence of (i)a-Si:H is detrimental to the device performance, especially for the cell FF. Secondly, for cells without (i)a-Si:H layer, the cell performance was improved by replacing (n)a-Si:H with more conductive and low activation energy (n)nc-Si:H layer. At last, the TRJ with dual-n-layer, (p+)poly-SiOx/(n)a-Si:H/(n)nc-Si:H, was found to be most promising. And the cell FF decreases with (n)a-Si:H layer thickness. However, instead of only depositing (n)nc-Si:H, the (n)a-Si:H was kept for its better passivation ability than (n)nc-Si:H, as it is directly deposited on the c-Si surface at BSF in hybrid IBC cells.
Then the hybrid design with dual-n-layer was demonstrated and optimized regarding the passivation quality, TRJ efficiency and the Rshunt in IBC cells. We firstly demonstrated that poly-Si delivers better performance than poly-SiOx due to its lower resistivity. With 18 nm(at textured BSF)(n)n-Si:H, the (n)a-Si:H layer thickness optimizes at 3 nm in poly-Si/SHJ hybrid cells. The pitch width was also found to have an influence on cell external parameters as the number of fingers decreases with pitch width. The cell FF increases and the Jsc decreases with pitch widening. The best cell obtained in this project has 3/18 nm (n)a-Si:H/(n)nc-Si:H and a medium pitch width (650 μm). It has a Voc of 665 mV, a Jsc of 39.36 mA/cm2, a FF of 74.33% and an efficiency of 19.45%.

Crystalline silicon (c-Si) interdigitated back contacted (IBC) solar cell with poly-Si passivating contacts is one of the most promising approaches to achieve high conversion efficiency solar cells. The fabrication of IBC silicon-based solar cells provided by poly-Si passivating contacts is investigated in this thesis. The passivating poly-Si contacts structure used in this work is based on an ultra-thin layer of t-SiOX with optimized poly-Si thicknesses of 250 nm and the implantation parameters of Phosphorous and Boron doping with 6e15 and 5e15 ions/cm2 respectively, at a fixed implantation energy of 20 keV. The influence of the post-implantation annealing conditions is discussed with experimental results, obtained on symmetrical test structures with thermal SiOx/doped poly-Si on each side. The bestobtained passivation result for n+ -poly-Si contact was 728 mV at annealing conditions of 1050°C for 1 minute, while for the p+ poly-Si contact at the same annealing conditions 699 mV is obtained. To enhance the passivation, PECVD deposited SiNX capping layer and annealing in forming gas as hydrogenation processes are carried out. Then, FBC solar cells are fabricated to evaluate the electrical performances, in terms of passivation and carrier transport, of the poly-Si contacts structures, which are prepared with different annealing conditions, in terms of temperature and time. The results obtained from the FBC cells show that increasing the annealing temperature leads to an increase in the passivation thus the VOC. The best-obtained VOC was 706mV for the wafer annealed at 1050°C for 1 minute. To enhance the optical properties of the IBC cells, the surface is textured and the influence of doping dose on passivation of the front surface field (FSF) is evaluated. Four different passivation stack layers SiNX, AlOX/SiNX, a-Si/SiNX, and double SiNy /SiNX are evaluated for FSF implanted with dose of 1e14 ions/cm2. The best-obtained passivation result is from FSF sample passivated with a-Si/SiNX. It shows excellent passivation property with iVOC of 714 mV and a J0 of 7.5 fA/cm2. while the other stacks show lower passivation of iVOC 708 mV for the AlOX/SiNX sample and iVoc=686 mV for the SiNy /SiNX sample. The influence of FGA on the FSF passivation quality is also evaluated. The results show that the sample passivated with a-Si/SiNX experienced a sharp decrease of 35 mV in the iVOC after FGA due to the low thermal stability of the a-Si:H. On the other hand, other FSF samples with passivation stacks of SiNX, AlOX/SiNX, and SiNX /SiNX show a positive influence upon the FGA on their passivation quality as a result of the extra hydrogen diffusion during the FGA which saturates more defects on the c-Si surface. The implantation of the optimized thermal SiOx/ doped poly-Si structure and FSF with a-Si/SiNX passivating layer into the IBC solar cells leads to high-efficiency IBC solar cells. The record cell has a conversion efficiency of 21.04% and 22.15% after the post metallization annealing, VOC of 681 mV, and FF of 78,9 with Jsc of 37.5 mA/cm2

Carrier-selective passivating contacts (CSPC) have been proven to be effective in suppressing recombination losses at metal-silicon interface in high-efficiency crystalline silicon solar cells. The poly-Si-based CSPCs consisting of SiOX/poly-Si stacks are used in this thesis due to their compatibility with high thermal budgets. CSPCs with thin poly-Si layers are preferred since thicker poly-Si layers induce significant parasitic absorption at device level. The bifacial solar cell design could provide a higher energy yield than monofacial solar cells and largely reduce the consumption of metals such as silver, indium due to the contribution of reflected light. The objective of this thesis is to fabricate double-side textured copper (Cu)-plated bifacial poly-Si solar cells. It is achieved by developing thin poly-Si contacts, addressing the TCO sputtering-induced passivation damage, and optimizing the Cu-plating processes.
Firstly, the passivation of the poly-Si symmetric samples and solar cells was optimized. 16 nm-thick n+ poly-Si and 16 nm-thick p+ poly-Si symmetric samples with intrinsic layer grown through PECVD demonstrated good passivation quality indicated by their iVOC of 713 mV and 665 mV respectively. To further improve the passivation quality of the p+ poly-Si, the layer thickness and the doping gas flow ratios were varied. Best passivation was achieved for a solar cell precursor with 42 nm-thick p+ poly-Si layers. The optimum doping gas flow ratio was found to be SiH4-B2H6=20/15 sccm. The highest iVOC achieved was 692 mV.
TCO sputtering caused a severe passivation drop of ~90 mV in solar cell precursors. Post-deposition annealing treatments and 2-step TCO sputtering techniques were used to reduce such a passivation loss. However, it was challenging to reproducibly obtain solar cell precursors with good passivation quality before metallization step. The initial solar cell with double side TCO use showed cell parameters were: VOC 398 mV, FF 56.22%, JSC 30.55 mA/cm2 and η 6.85% (from n-side illumination).
To maintain a good passivation quality of the solar cell precursor, an 8 nm-thick MoOX buffer layer was introduced on top of the p+ poly-Si layer. This approach effectively reduced the passivation drop from 91 mV to 12 mV. However, the MoOX layer was observed to strongly react with the solution which was used for silver seed layer removal in Cu-plating metallization procedure. Different approaches were tested to obtain a well-plated p+ poly-Si side. As for the n+ poly-Si side, a TCO-free design was deployed. To ensure a good adhesion of the plated Cu fingers, a Ti/Ag (8 nm/192 nm) seed layer was employed before Cu-plating step. Moreover, an additional SiOX layer, which acts as the anti-reflection coating, was deposited on the n-side of a complete solar cell. With these adjustments, the solar cell performance was improved to: VOC 610 mV, FF 64.98%, JSC 36.95 mA/cm2 and η 14.64% (from n-side illumination).
Furthermore, with reducing the Ti thickness in the metal seed layer to 2 nm. The solar cell performance was further improved to VOC 611 mV, FF 69.58%, JSC 36.16 mA/cm2 and η 15.38% (from n-side illumination). The bifaciality factor is 89%.

To meet the rapidly increasing global demand for energy, the potential of solar energy is being exploited towards its maximum capacity. The invention of poly-Si based passivating contacts has created an opportunity for c-Si solar cells to reach conversion efficiencies above 25%, while keeping the processing sequence relatively simple. Based on ultra-thin SiO푥 and highly doped poly-Si, this contact structure combines chemical passivation with field-effect passivation to enhance the c-Si surface passivation. Ever since 2016, the carrier transport mechanism through pinholes in the SiO푥 has been investigated, showing that the pinholes can aid in achieving a low contact resistivity (휌푐) while maintaining a low recombination (퐽0). In this work, the presence of pinholes and their impact on the passivation quality in poly-Si passivating contacts is investigated. Additionally, a method is explored to extract the metal-induced recombination (퐽0,푚푒푡푎푙), without the need for fabricating a solar cell structure...

The poly-Si IBC topology is one of the most promising silicon solar cell designs and has already achieved >26% efficiency. In this work we optimise the front surface field (FSF) and apply rear hydrogenation to the poly-Si IBC structure developed by the TU Delft PVMD group. An investigation is also made of a PECVD tunnel oxide as a replacement for NAOS oxide currently used. The PECVD method allows greater control of the layer thickness and stoichiometry, as well as the ability to grow and cap the oxide layer without breaking vacuum. This process also leads to the development of poly-SiOx passivating contacts, which exhibit lower parasitic absorption as compared with their poly-Si counterpart. The optimised PECVD oxide is implemented into FBC solar cells. In the optimisation of the FSF the best performance came from the a-Si:H/SiNx:H stack using thicknesses of 18 and 75 nm respectively. It achieved an iVoc of 731 mV and a J0 of 4 fAcm-2 on undoped textured samples. This was owing to the high hydrogen content of the materials, but had the disadvantage of parasitic absorption from the a-Si:H layer. The stack was tested against different FSF doping levels and with varying thickness to reduce the parasitic absorption. The best performance remained on the undoped (No FSF) case with 18 nm a-Si, achieving 731 mV and 13.5 fAcm-2. The selected a-Si thickness for implementation into IBCs was 9 nm. This was estimated to provide lower parasitic absorption whilst still achieving high passivation. A peak value of 722 mV was obtained for No FSF case. A study of rear hydrogenation options revealed the a-Si:H/SiNx:H layer provided the best results. The layer thicknesses were 6 and 75 nm respectively. This led to an overall passivation of 725 and 709 mV on poly-Si IBC BSF and emitter symmetrical samples. This was due to the high hydrogen content in the layers raising the passivation quality of the poly-Si passivating contacts on the c-Si interface. The implementation into IBCs was unsuccessful owing to shunting of emitter and BSF regions. The SiNx layer was too thin to withstand the post-metalisation annealing and both poly-Si regions were contacted. Peak values of 7.22% efficiency and 600 mV Voc were obtained. In the investigation of the PECVD tunnel oxide measurements different layer thicknesses were made. After a 3 minute reaction time of c-Si in N2O plasma a thickness of 1.22 nm was achieved. Growth saturated after 21 minutes at a thickness of 1.98 nm. Implementation in flat n-poly-SiOx passivating contacts showed that the oxide with 1.97 nm thickness, oxide 18, obtained the best result of 723 mV. On flat p-poly-SiOx passivating contacts the 1.85 nm oxide, oxide 12, achieved the best result of 668 mV. On textured n-poly-SiOx passivating contacts oxide 18 again performed best, with 710 mV. As the p-poly-SiOx was limiting, oxide 12 was selected for implementation into FBC cells. The implementation into FBC cells revealed that the oxide layer had a very high contact resistance value that limited performance. The best Voc of 517 mV came with an FF of 89%. A TLM measurement showed that for oxide 12 contact resistance was 3.71 kOhm-cm2. This was therefore restricting the flow of current within the cell.

As a new face of PV industry, bifacial technology offers the utmost utilization of reflected light while efforts are still required to further improve its cell efficiency. The objective of this thesis project is to fabricate bifacial solar cell with poly-Si passivating contacts only underneath metal grids. An advanced bifacial architecture is presented combining carrier-selective n/p+ doped poly-Si passivating contacts to quench recombination at c-Si/metal interface, and lightly doped n/p type c-Si surface to ensure high optical transparency on both sides.
LPCVD based doped poly-Si works together with wet-chemically grown ultrathin oxide, providing both field-effect and chemical passivation for metal contacts. By investigation into poly-Si thickness and thermal budget, symmetric test samples show a good passivation of 5.4fA/cm2 J0 for n doped poly-Si and 10.9fA/cm2 J0 for p doped poly-Si.
An optimal n+ c-Si surface passivation of 14.5 fA/cm2 J0 is achieved with PECVD deposited a-Si:H/SiNX stack on textured wafers. For p+ c-Si surface passivation, the influence of thermal ALD Al2O3 film thickness and Forming Gas Annealing on Al2O3/SiNX stack is studied. Also an optimal p+ surface with 123 Ω/sq sheet resistance is formed by boron ion implantation approach, which provides space to play with the trade-off between surface passivation and lateral carrier transport for emitter and front/back surface field.
Applying optimized results, bifacial solar cell fabrication enables only one-time high temperature annealing for both highly doped poly-Si and lightly doped c-Si activation. Following such flowchart, n/p bulk rear/front junction test PeRFeCT cells were fabricated, stressing the importance of FSF passivation on solar cell VOC performance.
A good passivated bifacial cell precursor is also prepared with iVOC of 714mV while BHF, poly-etch and TMAH developer in bifacial cell fabrication is proved to over-etch poly-Si passivaitng material, resulting in a poor performance. For further improvement with smooth processing and delicate control of etching steps, a good performed bifacial solar cell with poly-Si passivaing contacts is expected to be fabricated.

Carrier-selective passivating contacts (CSPCs) is now a popular contact structure that effectively passivates the crystalline silicon (c-Si) surface as well as selectively extracts the specific type of charge carrier (electrons or holes). In this thesis work, we developed the CSPCs based on oxygen-alloyed polycrystalline silicon (poly-SiOx) passivating contacts, which shows less parasitic absorption compared with the polycrystalline silicon (poly-Si) passivating contacts.
In order to deploy poly-SiOx CSPCs in c-Si solar cells, we optimized the oxygen content, doping level, high-temperature annealing as well as the hydrogen passivation process. As a result, the excellent passivation for n-type poly-SiOx passivating contact on both flat surface (implied-VOC of 727 mV and J0 of 2.4 fA/cm2) and textured surface (implied-VOC of 723 mV and j0 of 6.9 fA/cm2) and for p-type poly-SiOx passivating contact on flat surface (implied-VOC of 709 mV and J0 of 13.9 fA/cm2) are obtained.
With the optimized poly-SiOx passivating contacts, the front and back contacted (FBC) solar cells were fabricated in this thesis. An excellent fill factor of 83.5% was obtained in the solar cell with front and rear poly-SiOx passivating contacts, indicating an efficient carrier transport and collection. An active area efficiency of 21.5% featuring Jsc of 40.8 mA/cm2 was measured on a front side textured FBC solar cell with the optimized poly-SiOx passivating contacts. It indicates the potential for achieving a conversion efficiency of above 23.0 % with the same cell configuration in the short term.

Wafer-based crystalline silicon (c-Si) solar cells currently dominate the photovoltaic (PV) market with high-thermal budget (T > 700 ∘C) architectures (e.g. i-PERC and PERT). However, also low-thermal (T < 250 ∘C) budget heterojunction architecture holds the potential to become mainstream owing to the achievable high efficiency and the relatively simple lithography-free process. A typical heterojunction c-Si solar cell is indeed based on textured n-type and high bulk lifetime wafer. Its front and rear sides are passivated with less than 10-nm thick intrinsic (i) hydrogenated amorphous silicon (a-Si:H) and front and rear side coated with less than 10-nm thick doped a-Si:H layers. Finally, transparent conductive oxide (TCO) and metal at both front and rear side terminate the device. Of course, the front side metal is merely a grid, allowing light to impinge on the c-Si wafer. In this project, an HIT heterojunction architecture is investigated, it is used a double intrinsic passivating layer at the front and an highly hydrogenated (p) a-Si:H forming the emitter; i/n passivating stack at the rear in the role of back surface field; a TCO formed by IO:H and ITO and finally copper as front metal contact.