Spin qubits in quantum dots define an attractive platform for quantum information because of their compatibility with semiconductor manufacturing, their long coherence times, and the ability to operate above one Kelvin. However, despite demonstrations of SWAP oscillations, the integration of this two-qubit gate together with single-qubit control to create a universal gate set as originally proposed for single spins in quantum dots has remained elusive. Here, we show that we can overcome these limitations and execute a multitude of native two-qubit gates, together with single-qubit control, in a single device, reducing the operation overhead to perform quantum algorithms. We demonstrate single-qubit rotations, together with the two-qubit gates CROT, CPHASE, and SWAP, on a silicon double quantum dot. Furthermore, we introduce adiabatic and diabatic composite sequences that allow the execution of CPHASE and SWAP gates on the same device, despite the finite Zeeman energy difference. Both two-qubit gates can be executed in less than 100 ns and, by theoretically analyzing the experimental noise sources, we predict control fidelities exceeding 99%, even for operation above one Kelvin.

We determine the energy splitting of the conduction-band valleys in two-dimensional electrons confined in silicon metal oxide semiconductor Hall-bar transistors. These silicon metal oxide semiconductor Hall bars are made by advanced semiconductor manufacturing on 300 mm silicon wafers and support a two-dimensional electron gas of high quality with a maximum mobility of 17.6×103 cm2/Vs and minimum percolation density of 3.45×1010 cm-2. Because of the low disorder, we observe beatings in the Shubnikov-de Haas oscillations that arise from the energy splitting of the two low-lying conduction band valleys. From the analysis of the oscillations beating patterns up to T=1.7 K, we estimate a maximum valley splitting of ?EVS=8.2 meV at a density of 6.8×1012 cm-2. Furthermore, the valley splitting increases with density at a rate consistent with theoretical predictions for a near-ideal semiconductor-oxide interface.

Continuing advancements in quantum information processing have caused a paradigm shift from research mainly focused on testing the reality of quantum mechanics to engineering qubit devices with numbers required for practical quantum computation. One of the major challenges in scaling toward large-scale solid-state systems is the limited input/output (I/O) connectors present in cryostats operating at sub-kelvin temperatures required to execute quantum logic with high fidelity. This interconnect bottleneck is equally present in the device fabrication-measurement cycle, which requires high-throughput and cryogenic characterization to develop quantum processors. Here we multiplex quantum transport of two-dimensional electron gases at sub-kelvin temperatures. We use commercial off-the-shelf CMOS multiplexers to achieve an order of magnitude increase in the number of wires. Exploiting this technology, we accelerate the development of 300 mm epitaxial wafers manufactured in an industrial CMOS fab and report a remarkable electron mobility of (3.9 ± 0.6) × 10⁵ cm²/Vs and percolation density of (6.9 ± 0.4) × 10¹⁰ cm⁻², representing a key step toward large silicon qubit arrays. We envision that the demonstration will inspire the development of cryogenic electronics for quantum information, and because of the simplicity of assembly and versatility, we foresee widespread use of similar cryo-CMOS circuits for high-throughput quantum measurements and control of quantum engineered systems.

Current implementations of quantum computers suffer from large numbers of control lines per qubit, becoming unmanageable with system scale up. Here, we discuss a sparse spin-qubit architecture featuring integrated control electronics significantly reducing the off-chip wire count. This quantum-classical hardware integration closes the feasibility gap towards a CMOS quantum computer.

Extremely long coherence times, excellent single-qubit gate fidelities, and two-qubit logic have been demonstrated with silicon metal-oxide-semiconductor spin qubits, making it one of the leading platforms for quantum information processing. Despite this, a long-standing challenge in this system has been the demonstration of tunable tunnel coupling between single electrons. Here we overcome this hurdle with gate-defined quantum dots and show couplings that can be tuned on and off for quantum operations. We use charge sensing to discriminate between the (2,0) and (1,1) charge states of a double quantum dot and show excellent charge sensitivity. We demonstrate tunable coupling up to 13 GHz, obtained by fitting charge polarization lines, and tunable tunnel rates down to <1 Hz, deduced from the random telegraph signal. The demonstration of tunable coupling between single electrons in a silicon metal-oxide-semiconductor device provides significant scope for high-fidelity two-qubit logic toward quantum information processing with standard manufacturing.

Atomic-scale disorder at the top interface of a Si quantum well is known to suppress valley splitting. Such disorder may be inherited from the underlying substrate and relaxed buffer growth, but can also arise at the top quantum well interface due to the random SiGe alloy. Here, we perform activation energy (transport) measurements in the quantum Hall regime to determine the source of the disorder affecting the valley splitting. We consider three Si/SiGe heterostructures with nominally identical substrates but different barriers at the top of the quantum well, including two samples with pure-Ge interfaces. For all three samples, we observe a surprisingly strong and universal dependence of the valley splitting on the electron density (E_v ∼ n^2.7) over the entire experimental range (E_v = 30-200 μeV). We interpret these results via tight binding theory, arguing that the underlying valley physics is determined mainly by disorder arising from the substrate and relaxed buffer growth.