R

R Chaves Fernandes

14 records found

An improved RNS reverse converter for the {2 2n+1-1, 2n, 2n-1} moduli set

Residue-to-binary converters for the moduli set {2 2n+1, 2 2n, 2n-1}

Cost-efficient SHA hardware accelerators

BRAM-LUT tradeoff on a polymorphic DES design

Vectorized AES core for high-throughput secure environments

Merged computation for whirlpool hashing

On-the-fly attestation of reconfigurable hardware

Dynamic FPGA reconfigurations with run-time region delimitation

Secure computing on reconfigurable systems
Doctoral thesis (2007) - R Chaves Fernandes (author)

Reconfigurable cryptographic processor

Reconfigurable memory based AES co-processor

Improving SHA-2 hardware implementations

Rescheduling for optimized SHA-1 calculation

HLL-to-HDL generation: results and challenges