Silicon heterojunction (SHJ) solar cells have achieved a record efficiency of 26.81% in a front/back-contacted (FBC) configuration. Moreover, thanks to their advantageous high V_OC and good infrared response, SHJ solar cells can be further combined with wide bandgap perovskite cells forming tandem devices to enable efficiencies well above 33%. In this study, we present strategies to realize high-efficiency SHJ solar cells through combined theoretical and experimental studies, starting from the optimization of Si-based thin-film layers to the implementation of electrodes with reduced indium and silver usage. Advanced opto-electrical simulations, which enable comprehensive theoretical understandings of the main physical mechanisms governing carriers’ collection and light management, provide clear pathways for device designs and experimental optimizations. We present the fabricated FBC-SHJ solar cells in both monofacial and bifacial configurations with the best efficiencies of 24.18% and 23.25%, respectively. We point out that to achieve optimum device performance, the compositional materials should be holistically optimized and evaluated as part of the contact stacks with adjacent layers. As an outlook beyond the classical FBC-SHJ solar cell architecture, we propose various novel SHJ-based solar cell architectures. Their potential performance was assessed and compared via rigorous opto-electrical simulations and a maximal efficiency of 27.60% was simulated for FBC-SHJ solar cells featuring localized contacts.

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An alloy based on the group IV elements germanium and tin has the potential of yielding an earth-abundant low bandgap energy semiconductor material with applications in the fields of micro-electronics, optics, photonics and photovoltaics. In this work, the first steps towards the plasma enhanced chemical vapour deposition (PECVD) processing of a chemically stable, low bandgap energy and intrinsic GeSn:H alloy are presented. Using a tetramethyltin (TMT) precursor, over 70 PECVD processed films are presented. It was observed that the opto-electrical film properties are a result of the material phase fraction, void fraction, hydrogenation and the level of tin and carbon integration. In particular, managing the carbon integration from the TMT precursor into the material is crucial for obtaining low-bandgap and chemically stable materials. The collective findings from this work will aid in successfully identifying PECVD processing pathways for GeSn:H.@en

Surface textures that result in high optical yields are crucial for high efficiency photovoltaic (PV) devices. In this work three different texturing approaches are presented that result in smooth concave structures devoid of sharp features. Such features can sustain the crack-free growth of device quality nano- to poly-crystalline materials such as nano-crystalline silicon, perovskites or C(I)GS, facilitating routes towards hybrid multijunction PV devices. A sacrificial implanted poly-c-Si layer is used to develop a random surface texture for the first texturing approach (Tsac). The influence of the processing conditions, such as layer thickness, implantation energy, dose and ion type, annealing time and temperature, of the sacrificial layer on the developed surface features is investigated. Additionally, a photolithographically developed honeycomb texture (Thoney) is presented. The influence of mask design on the honeycomb features is discussed and a relation is established between the honeycomb period and crack formation in nano-crystalline silicon layers. The reflective properties (spectral reflection, haze in reflection and angular intensity distribution) of these approaches are characterized and compared to a third texturing approach, Tsp, the result of chemically smoothened pyramidal <111> features. It was demonstrated that high optical scattering yields can be achieved for both Thoney and Tsp. Additionally, the performance of a-Si/nc-Si tandem devices processed onto the different textures is compared using both optical device simulations and real device measurements. Simulations demonstrate strong improvements in Jsc-sum (≈45%), in reference to a flat surface, and high Voc*FF of over 1 V are demonstrated for Tsp.@en

We formed phosphorous(P)-ion-implanted n-BaSi₂ films on p-Si(111) substrates and demonstrated solar-cell functionality of the n-BaSi₂/p-Si heterojunction under AM1.5 illumination. The BaSi₂ films were grown by molecular beam epitaxy, followed by implantation of P ions to the BaSi₂ films using PF₃ gas at an energy of 10 keV and a dose of 1 × 10¹⁴ cm⁻². Subsequent postannealing was conducted at 500°C in Ar for different durations (t = 30–480 s) to activate the P atoms. The diffusion coefficient for P atoms in BaSi₂ was evaluated from the depth profiles of P atoms by secondary-ion mass spectrometry. The activation energies of lattice and grain boundary diffusion were found to be 1.1 ± 0.6 and 2.5 ± 0.6 eV, respectively. From the analysis of Raman and photoluminescence spectra, the ion implantation damage was recovered by the postannealing. For one treated sample with t = 120 s, the internal quantum efficiency reached 67% at a wavelength of 870 nm. This is the highest ever achieved for n-BaSi₂/p-Si heterojunction solar cells. Ion implantation is thus applicable to BaSi₂ films grown by any other method. This achievement thereby opens a new route for the formation of BaSi₂ solar cells.

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This work focuses mainly on development of modulated surface texturing of Al substrate for thin-film, silicon-based, flexible solar cells. We compared the current roll-to-roll process at industrial level with a newly developed lab-scale texturing that offers better performance both with KOH and NaOH etching of Al foil. The kinetics of these etching chemicals, modelled with an Arrhenius equation, is evaluated in both methods, activation energy and pre-exponential factor are calculated depending on etching concentration. We also deployed a new roll-to-roll experiment that shows better optical properties than the baseline. Finally, we also show the first results of micromorph tandem devices on the baseline texturing.

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Hydrogenation of polycrystalline silicon (poly-Si) passivating contacts is crucial for maximizing their passivation performance. This work presents the application of Al2O3 prepared by atomic layer deposition as a hydrogenating capping layer. Several important questions related to this application of Al2O3 are addressed by comparing results from Al2O3 single layers, SiNx single layers, and Al2O3/SiNx double layers to different poly-Si types. We investigate the effect of the Al2O3 thickness, the poly-Si thickness, the poly-Si doping type, and the postdeposition annealing treatment on the passivation quality of poly-Si passivating contacts. Especially, the Al2O3/SiNx stack greatly enhances the passivation quality of both n+ and p+ doped as well as intrinsic poly-Si layers. The Al2O3 layer thickness is crucial for the single-layer approach, whereas the Al2O3/SiNx stack is less sensitive to the thickness of the Al2O3 layer. A thicker Al2O3 layer is needed for effectively hydrogenating p+ compared to n+ poly-Si passivating contact. The capping layers can hydrogenate poly-Si layers with thicknesses up to at least 600 nm. The hydrogenation-enhanced passivation for n+ poly-Si is found to be more thermally stable in comparison to p+ poly-Si. These results provide guidelines on the use of Al2O3 capping layers for poly-Si contacts to significantly improve their passivation performance.

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In this article, we develop in parallel two fabrication methods for copper (Cu) electroplated contacts suitable for either silicon nitride or transparent conductive oxide antireflective coatings. We employ alternative seed layers, such as evaporated Ag or Ti, and optimize the Ti-Cu or Ag-Cu contacts with respect to uniformity of plating and aspect ratio of the final plated grid. Moreover, we test plating/deplating sequence instead of a direct current plating or the SiO ₂ layer approach to solve undesired plating outside the designed contact openings. The main objective of this paper is to explore the physical limit of this contact formation technology keeping the process compatible with industrial needs. In addition, we employ the optimized Cu-plating contacts in three different front/back-contacted crystalline silicon solar cells architectures: 1) silicon heterojunction solar cell with hydrogenated nanocrystalline silicon oxide as doped layers, 2) thin SiO ₂/doped poly-Si-poly-Si solar cell, and 3) hybrid solar cell endowed with rear thin SiO ₂/poly-Si contact and front heterojunction contact. To investigate the metallization quality, we compare fabricated devices to reference ones obtained with standard front metallization (Ag screen printing and Al evaporation). We observe a relatively small drop in V _OC by 5 to 10 mV by using Cu-plating front grid, whereas fill factor was improved for solar cells with Cu-plated front contact if compared with evaporated Al.

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In this work we focus on texturing Al substrate in order to employ the modulated surface texturing approach for thin-film, flexible, micromorph solar cells. We deployed two different methods to induce micro-craters in Al foil, i) bare Al etching by KOH and ii) AZO sacrificial layer etched in KOH. After modelling the etching kinetics of KOH on Al, we characterized the 2D correlation length and rms roughness of these samples and find the optimal aspect ratio of 12% to deposit high-quality 3 µm-thick nc-Si. Finally, excellent angular scattering properties have been measured for both employed methods.

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Thin-film silicon single- and multi-junctions are a viable option to manufacture lightweight, flexible solar modules via high-throughput roll-to-roll (R2R) processes, starting from earth-abundant, non-toxic raw materials, at very cost competitive levels and with a range of application spanning from large area solar plants to portable devices. Nevertheless, flexible thin-film silicon modules have currently lower power conversion efficiency (PCE) compared to modules fabricated on glass substrates. Here, we focus on improving the efficiency of flexible single-junction modules by changing the chemical composition and the growth conditions of the p-doped window layer. Highly efficient devices require a window layer with excellent optical and electronic properties so that incoming light photons can easily reach the absorber layer, while photogenerated holes can be promptly extracted from the device. Our baseline modules have a p-doped hydrogenated silicon carbide (p-SiC:H) window layer. In order to simultaneously reduce optical losses and improve the charge collection, we reduced the thickness of p-SiC:H by modifying the plasma enhanced chemical vapor deposition tool, and we inserted a layer of p-doped nanocrystalline silicon oxide (p-nc-SiOx:H) in between p-SiC:H and TCO. The double p-layer modules that we obtained showed a 2% increase in the open circuit voltage compared to the single p-layer modules. Fine-tuning the deposition conditions for both p-layers will further reduce optical and resistive losses and improve the PCE of the modules; additionally, the double p-layer architecture will allow for an accurate control of the light transmission through the window layer, facilitating the current matching for multi-junction modules.

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In this work, we develop SiO_x/poly-Si carrier-selective contacts grown by low-pressure chemical vapor deposition and boron or phosphorus doped by ion implantation. We investigate their passivation properties on symmetric structures while varying the thickness of poly-Si in a wide range (20-250 nm). Dose and energy of implantation as well as temperature and time of annealing were optimized, achieving implied open-circuit voltage well above 700 mV for electron-selective contacts regardless the poly-Si layer thickness. In case of hole-selective contacts, the passivation quality decreases by thinning the poly-Si layer. For both poly-Si doping types, forming gas annealing helps to augment the passivation quality. The optimized doped poly-Si layers are then implemented in c-Si solar cells featuring SiO₂/poly-Si contacts with different polarities on both front and rear sides in a lean manufacturing process free from transparent conductive oxide (TCO). At cell level, open-circuit voltage degrades when thinner p-type poly-Si layer is employed, while a consistent gain in short circuit current is measured when front poly-Si thickness is thinned down from 250 to 35 nm (up to +4 mA/cm²). We circumvent this limitation by decoupling front and rear layer thickness obtaining, on one hand, reasonably high current (J_SC-EQE = 38.2 mA/cm²) and, on the other hand, relatively high V_OC of approximately 690 mV. The best TCO-free device using Ti-seeded Cu-plated front contact exhibits a fill factor of 75.2% and conversion efficiency of 19.6%.

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This work shows an alternative surface cleaning method for c-Si wafers to replace the standard chemical procedures as RCA or HNO 3 which involve hazardous chemicals or unstable processes. The method consists in a high-temperature oxidation treatment (HTO) performed in a classical tube furnace that incorporates organic and metal particles present on the c-Si surfaces in the growing SiO 2 layer. The result is as a reliable pre-treatment method for obtaining less defective c-Si surfaces ready for solar cell fabrication after SiO 2 removal. To test the surface passivation quality obtained with our alternative cleaning method, we grow amorphous silicon (a-Si:H) layers by plasma enhanced chemical vapor deposition on both sides of the c-Si wafer and systematically compare the effective carrier lifetime (τ eff ) and implied V OC (iV oc ) to the wafer treated with the standard cleaning in our laboratory. We optimize HTO treatment time reaching τ eff of ∼6 ms and iV oc of 721 mV for the best sample. We ascribe the improved passivation quality using HTO to two concurrent factors. Firstly, the encapsulation of defects into SiO 2 layer that is then etched prior a-Si:H deposition and secondly, to modification of the pyramids’ morphology that facilitates the surface passivation. SEM pictures and reflection measurements support the latter hypothesis. @en

In this work we develop a rear emitter silicon solar cell integrating carrier-selective passivating contacts (CSPCs) with different thermal budget in the same device. The solar cell consists of a B-doped poly-Si/SiO_x hole collector and an i/n hydrogenated amorphous silicon (a-Si:H) stack acting as electron collector placed on the planar rear and textured front side, respectively. We investigate the passivation properties of both CSPCs on symmetric structures by optimizing the interdependency among annealing temperature, time and environment. The optimized B-doped poly-Si/SiO_x reaches a saturation current density of ~10 fA/cm² on n-type wafers and an implied open circuit voltage (iV_OC) of 716 mV. Furthermore, the i/n a-Si:H stack shows an effective carrier lifetime above 4 ms and iV_OC of ~705 mV for cell-relevant layers thickness. After a post-deposition annealing in H₂, lifetime is above 10 ms and iV_OC = 708 mV. Finally, we optimize the optoelectronic properties of indium-based transparent conductive oxide (Indium Tin Oxide ITO and hydrogenated indium oxide IO:H) to reduce parasitic absorption with a gain in short circuit current density of 0.23 mA/cm². In conclusion, the optimized layer stacks are implemented at device level obtaining a device with V_OC = 704 mV, fill factor of 73.8%, a short circuit current of 39.7 mA/cm² and 21.0% aperture-area conversion efficiency.

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Electricity consumption is increased in last twenty years. It is crucial therefore to find alternative, renewable and sustainable sources to mantain this development. Solar energy has proved to be a valid alternative to produce clean energy. The gigantic development of solar energy technology in the last twenty years has lead to a scenario inwhich solar energy is no more a dream or an experimental demonstration of scientific principles, but it is fully integrated in energy production. To make it comparable with other sources, prices are lowered employing mass-production and more simple technologies. One of the possible technologies available is to use crystalline silicon wafers as absorber layer in combination with ion implantation doping technique. This doping technology is inherited by integrated circuit industry. Therefore, the context of this thesis is to explore ion implantation to simplify processing of c-Si solar cells. Indeed, the feature of this doping technique allows to speed up processing of current industrial standard named passivated emitter rear contact (PERC). Moreover, the integration of so-called carrier-selective passivating contacts with ion implantation is of great interest for future evolution of c-Si solar cell industry. @en

This article presents recent approaches for achieving high conversion efficiency of crystalline silicon solar cells at Delft University of Technology. The new approaches are based on heterojuction interfaces between the crystalline silicon (c-Si) absorber and carrier-selective passivating contact layers. We discuss silicon heterojunction solar cells with carrier-selective contact based on thin layers of hydrogenated amorphous silicon (a-Si: H) and on hydrogenated polycrystalline silicon (poly-Si) combined with a ultrathin silicon oxide layer. Both, the application of carrier-selective contacts in c-Si front-back contacted (FBC) and interdigitated back-contacted (IBC) solar cells with different thermal budgets are shown. The best performance was demonstrated with IBC c-Si solar cells with poly-Si carrier-selective passivating contacts with conversion efficiency η=23.0% and short-circuit current density JSC= 42.2 mAlcm².

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This paper shows the application of carrier-selective passivating contacts (CSPCs) in c-Si front-back contacted (FBC) and interdigitated back-contacted (IBC) solar cells with different thermal budgets. From lifetime analysis of our poly-Si and a-Si:H CSPCs, three FBC and one IBC architectures are devised to progressively increase efficiency (ç) and achieve record short-circuit current density (JSC): (i) a poly-poly cell (\eta = 19.6%); (ii) a selective emitter structure known as PeRFeCT (Passivated Emitter Rear and Front ConTacts, \eta = 20.0%); (iii) a so-called hybrid solar cell with poly-Si and a-Si:H CSPCs at rear and front, respectively (\eta = 21.0%); and (iv) an IBC solar cell with poly-Si CSPC (\eta = 23.0%, JSC = 42.2 mA/cm2).

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In this work, we present the application of poly-Si carrier-selective passivating contacts (CSPCs) as both polarities in interdigitated back-contacted (IBC) solar cell architectures. We compared two approaches to form a gap between the back-surface field (BSF) and emitter fingers. It is proved that the gaps prepared by both approaches are efficient in preventing carriers’ recombination. To minimize the reflection losses, we developed a novel modulated surface texturing (MST) structure as anti-reflection coating (ARC). It is obtained by superposing a nano-textured SiO₂ layer on the conventional micro-textured pyramids, which are passivated with a-Si:H / SiN_x:H layers. This approach decouples the light harvesting from the Si surface passivation, which potentially results in the highest possible optical and electrical performances of the solar cells. The reflectance (R) of the MST-ARC is very close to that of the high-aspect ratio nano-structured silicon (black-Silicon), achieving R < 1% between 450 and 1000 nm. The J₀ of MST-ARC passivated Si surface (6.3 fA/cm²) is the same as that of standard a-Si:H/SiN_x:H layers passivated pyramidally-textured Si surface. By applying this novel MST-ARC in our IBC solar cell, the highest J_SC observed in a device is 42.2 mA/cm² with a V_OC as high as 701 mV. A spectral response enhancement in case of the MST-ARC cell is observed over the whole wavelength range with respect to the cell with standard SiN_x:H ARC. The highest efficiency achieved in this work is 23.0%, with the potential to reach 24.0% in short term by using more conductive metal fingers.

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We determine the optical properties of poly-Si and poly-SiOx used as carrier-selective passivating contacts and present optical simulations showing the gains in solar cell current resulting from the reduced parasitic absorption losses in poly-SiOx.@en

In this work, the application of carrier-selective passivating contacts based on tunneling silicon-dioxide and ion-implanted poly-Si in front and rear contacted Si solar cells is presented. This paper addresses the need to minimize the contact recombination while still keeping high short circuit current. We aim to solve such trade-off with a novel solar cell architecture called Passivated Rear and Front ConTacts (PeRFeCT). Such design employs a selective passivating contact combined with standard homojunction on the front side in order to minimize contact recombination, while achieving high optical transparency and a full area passivating contact on the rear side. The opto-electrical modeling of this front/rear contacted architecture indicates a potential efficiency above 26%. As technology demonstration, we also report on the optimization of front surface field and processing of 2.8 × 2.8 cm2 wide solar cells leading to a 20.1% conversion efficiency.
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