Quantum computers are potential next generation computing system, and are expected to consist of millions of quantum bits (Qubits) which are typically required to operate at cryogenic temperature. Electronic devices are used to control and read out qubits, however there are limitations of wiring massive number of electronics and qubits between room temperature and cryogenic environment, which causes a bottleneck for the size-up of the quantum computer. Cryogenic temperature CMOS electronics, which are able to operate at low temperatures and be placed close to qubits have been proposed to overcome this bottleneck.
This work explores superconducting qubit, a type of widely used qubit in latest quantum computers, and the current output DAC designed for flux bias, which is a control method of superconducting qubits. The state-of-the-art DAC designs still face the problem of too high power consumption that restricts placing the control electronics close to the qubits. This thesis proposes a cryogenic current output high compliance regulated Digital-to-Analog converter, reducing the power consumption by 80% comparing to the latest studies.
This thesis proposes an architecture combining a slow DAC array and a fast switch array to realize fast speed while avoiding the high power requirement of high-speed fine DACs. The design uses an operational amplifier to build a feedback loop to regulate a cascoded current mirror array as the core of the high compliance regulated current DAC. The DAC achieves an output range of 0 to 500 𝜇A, with 8.41 nA of accuracy; a sampling rate of 250 MHz and 2.1 ns of rising and falling time. The maximum total power consumption is 179.4 𝜇W, which is less than 20% of the state-of-the-art design examples. The estimated chip area of this design is 2.7 𝑚𝑚2.