Liquid crystal polymer (LCP) has gained wide interest in the electronics industry largely due to its flexibility, stable insulation and dielectric properties and chip integration capabilities. Recently, LCP has also been investigated as a biocompatible substrate for the fabrication of multielectrode arrays. Realizing a fully implantable LCP-based bioelectronic device, however, still necessitates a low form factor packaging solution to protect the electronics in the body. In this work, we investigate two promising encapsulation coatings based on thin-film technology as the main packaging for LCP-based electronics. Specifically, a HfO2–based nanolaminate ceramic (TFE1) deposited via atomic layer deposition (ALD), and a hybrid Parylene C-ALD multilayer stack (TFE2), both with a silicone finish, were investigated and compared to a reference LCP coating. T-peel, water-vapour transmission rate (WVTR) and long-term electrochemical impedance spectrometry (EIS) tests were performed to evaluate adhesion, barrier properties and overall encapsulation performance of the coatings. Both TFE materials showed stable impedance characteristics while submerged in 60 °C saline, with TFE1-silicone lasting more than 16 months under a continuous 14V DC bias (experiment is ongoing). The results presented in this work show that WVTR is not the main factor in determining lifetime, but the adhesion of the coating to the substrate materials plays a key role in maintaining a stable interface and thus longer lifetimes.@en

In this work, we investigate the insulating performance of an atomic layer deposited (ALD) HfO2 - polymer bilayer for platinum (Pt) metallization. As test vehicles, Pt interdigitated comb structures (IDC) were designed and fabricated on SiO2/Si substrates. The IDCs were first coated with a 100 nm thin HfO2 ALD layer. A group of samples was further encapsulated with a low-viscosity biocompatible polydimethylsiloxane (PDMS) which resulted in an HFO2-PDMS bilayer. All samples were soaked in phosphate buffered saline for 450 days at room temperature. Evaluation of the coatings included monthly optical inspection and electrochemical impedance spectrometry. For ALD-only coated IDC structures, impedance results right after submersion in saline indicated the presence of defects in the layer. Long-term impedance recordings showed a slight drop, indicating water ingress through the defects, further exposing the metal to saline. For the HfO2-PDMS encapsulated samples, on the other hand, stable impedance results were recorded over the duration of the soak study. This suggests the excellent properties of low-viscosity PDMS both in filling the defects of the ALD layer and in maintaining a long-term underwater adhesion to HfO2. The results from this investigation, therefore, propose a new encapsulation method based on HfO2-PDMS bilayer for long-term packaging of active implants incorporating Pt metallization. @en

To meet the dimensional requirements for bioelectronic medicine, new packaging solutions are needed that could enable small, light-weight and flexible implants. For protecting the implantable electronics against biofluids, recently various atomic layer deposited (ALD) coatings have been proposed with high barrier properties. Before implantation, however, the protective coating should be evaluated for any defects which could otherwise lead to leakage and device failure. In these cases, the conventional helium leak test method can no longer be used due to the millimeter size of the implant. Therefore, an in-situ sensing platform is needed that could evaluate the coating and justify the implantation of the final device. In this work, we explore the possibility of using the CMOS bulk for such a platform. Towards this aim, as a proof of concept, test chips were made in a standard 6-metal 0.18 μm CMOS process and for the connection to the bulk, a p+ diffusion was used. A group of samples was then coated with an ALD multilayer. For coating evaluation, off-chip DC current leakage and impedance measurements were carried out in saline between the CMOS bulk and a platinum reference electrode. Results were compared between non-coated and coated chips that clearly demonstrated the potential of using the bulk as a sensing platform for coating evaluations. This novel approach could pave the way towards an all integrated in-situ hermeticity test, currently missing in mm-size implants.

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