This paper presents a new 2-step SAR ADC architecture for image sensors in machine vision applications. This structure effectively improves the structural problems of the image sensor caused by the area occupied by the ADC, such as linearity and temporal noise performance. In this work, we designed a two-step SAR ADC using a 6-bit SAR ADC and a PGA generating residue and offset. Since the number of unit capacitor's is reduced, the common centroid method is applied in the capacitor layout to improve the linearity. As a result, the capacitor mismatch characteristic is improved, and the differential nonlinearity (DNL) obtained is +0.36/-0.28LSB. In addition, the temporal noise is about 530 μ Vrns due to the small bandwidth of the column-parallel structure in an image sensor. The implemented ADC achieves 250 kS/ s as a maximum speed. The maximum frame rate of the sensor is 2500fps. The power consumption of the sensor, except for the LVDS interface, is 37.5 ∼mW. This sensor is designed in TowerJazz CIS 180 ∼nm process with one poly and four metal layers. The supply voltage of the analog and digital domains are 3.3 ∼V and 1.8 ∼V, respectively.

A column-parallel 10-bit SAR ADC for high-speed image sensors has been implemented. A fast offset calibration technique using memory is proposed to compensate for the offset mismatch, accompanied by an ADC designed for a narrow space the size of a single column pitch. The memory accumulates the variation of the offset to track the offset within two cycles. After applying the offset calibration technique, the offset variation of the ADC measured in each column is improved from 4.27LSB to 0.39LSB. The fixed-pattern noise (FPN) is also improved from 4.14LSB to 0.34LSB. This calibration method covers an offset range of ±32LSB. The implemented ADC achieves a maximum speed of 500kS/s. The maximum frame rate of the sensor is 3000fps. The power consumption of the sensor, excluding the LVDS interface, is 71mW. This sensor is designed in a TowerJazz CIS 180nm process with one poly four metal. The supply voltage of the analog and digital domains is 3.3V and 1.8V, respectively.